1. Field
Example embodiments relate to an analog-to-digital converter (ADC) for converting an analog signal to a digital signal, and more particularly, to a high-speed ADC which does not belong to conventional categories.
2. Description of the Related Art
With the rapid increase of demand on wideband digital communication, demand for an analog-to-digital converter (ADC) having higher speed and higher resolution is increasing. An ADC, for example an image sensor which maybe used for digital communication or a digital camera, may be used in the field of converting an audio signal or a video signal to a digital signal.
A conventional ADC may include a reference voltage generator and a structure for comparing a reference voltage generated by the reference voltage generator with an input signal (which may be converted into a voltage) The conventional ADC may obtain an approximate value of the input signal and convert the approximate value into a digital signal.
Various methods of increasing resolution using a circuit occupying a small area based on the basic structure described above with respect to an ADC have been researched and developed.
Examples of ADCs using different methods may include flash ADCs, folding and interpolating ADCs, and pipeline ADCs.
The folding and interpolating ADCs may have advantages of one-step conversion, low power consumption, and a small area. However, in order to increase the resolution of the folding and interpolating ADCs, a folding factor may be increased. When the folding factor increases, non-linearity may increase. To solve the problem, a method of cascading a plurality of folding stages having a small folding factor has been suggested.
The flash ADCs may have the simplest structure and the highest operating speed. 2N−1 comparators may be needed in order to implement an N-bit flash ADC. Accordingly, there may be a problem in that a large area may be needed to implement a flash ADC having high resolution.
The pipeline ADCs may cascade a plurality of comparator stages, and may thereby achieve high resolution with a small number of comparators. The pipeline ADCs may be slower than the flash ADCs but may also decrease a necessary area.